半導體－設計驗證職缺

深耕半導體領域多年，Robert Walters 的客戶橫跨大型跨國集團與臺灣知名企業，立即查看最新設計驗證相關職缺。

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職缺

Sr. Design Verification Engineer

已收藏的職缺

薪資: Negotiable

地區: Taipei

發佈日期: 2026年4月23日

About the role A technology company is seeking a Senior Digital Design Verification Engineer to join its hardware team in Taipei. You will focus on verifying complex digital designs and high-speed IPs used in performance-critical systems, working closely with design and architecture teams.

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Senior Design Verification Engineer

已收藏的職缺

薪資: Negotiable

地區: Hsinchu City

發佈日期: 2026年3月24日

About the Role Join a leading technology company in Hsinchu as a Design Verification Engineer and take part in verifying high-performance SerDes PHY IP. You will work with a collaborative team, using advanced verification methodologies and tools, while enjoying flexible work arrangements, training programs, and a culture that values growth and knowledge sharing.

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Design Verification Engineer (TCON)

已收藏的職缺

薪資: Negotiable

地區: Hsinchu City

發佈日期: 2026年3月24日

A leading player in the semiconductor industry is seeking an experienced Design Verification Engineer to join their innovative team in Hsinchu. This role is ideal for someone with a strong background in central DV flow development, VIP integration, and collaborative verification processes. The successful candidate will have the opportunity to make a significant impact on cutting-edge projects in a fast-paced, technology-driven environment.

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Design Verification Engineer (PCIE)

已收藏的職缺

薪資: Negotiable

地區: Hsinchu City

發佈日期: 2026年3月23日

Lead Design Verification Engineer – PCIe 📍 Location: Hsinchu 💰 Salary: Competitive and based on experience Keywords: SystemVerilog, UVM, Design Verification, PCIe, Protocol Stack, Python, Perl, Shell, TCL Join a high-performing team at the forefront of PCIe IP and SoC innovation. Our client is currently looking for an experienced Lead Design Verification Engineer to take ownership of UVM verification architecture and execution. This is an exciting opportunity to engage in full-lifecycle DV responsibilities, from strategy to silicon, while making a real impact on product quality and verification efficiency.

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Design Verification Engineer (TPE)

已收藏的職缺

薪資: Negotiable

地區: Taipei

發佈日期: 2026年3月20日

About the role A leading semiconductor company is looking for an SSD Digital IC Verification Engineer to join its team in Taipei. In this role, you will work on SoC and IP-level verification for high-speed interface products, contributing to product quality and performance. You will collaborate closely with design teams and participate in the full verification cycle, from planning to execution. This is an excellent opportunity for engineers who want to deepen their expertise in SSD and high-speed protocols such as PCIe, USB, and NVMe.

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