Position: Senior Functional Verification Engineer – SoC & High-Speed Interfaces
Location: Taipei
Join a fast-growing semiconductor company that powers next-gen multimedia and secure computing platforms. We’re hiring a seasoned verification engineer passionate about functional quality and real-world impact.
In this role, you’ll take the lead on verifying multimedia and networking IPs—HDMI, DP, MAC, Video Codec, and Security modules—while collaborating with a cross-functional global team.
Lead Design Verification Engineer – PCIe
📍 Location: Hsinchu
💰 Salary: Competitive and based on experience
Keywords: SystemVerilog, UVM, Design Verification, PCIe, Protocol Stack, Python, Perl, Shell, TCL
Join a high-performing team at the forefront of PCIe IP and SoC innovation. Our client is currently looking for an experienced Lead Design Verification Engineer to take ownership of UVM verification architecture and execution. This is an exciting opportunity to engage in full-lifecycle DV responsibilities, from strategy to silicon, while making a real impact on product quality and verification efficiency.
Keywords: Design Verification, CPU Micro-architecture, Test Plan Development, Simulation Methodologies, Formal Verification, Power Intent Verification
About the Role
We are looking for a Design Verification Engineer to join a leading global technology company. In this role, you will work on cutting-edge CPU projects, verifying design features across various aspects of CPU micro-architecture. This position offers a unique opportunity to collaborate with cross-functional teams and gain deep expertise in simulation, formal verification, and power intent verification. If you are passionate about CPU design and eager to work in an innovative, supportive environment, this is the opportunity for you.
Keywords: AI hardware, RISC-V, UVM, FPGA prototyping, Emulation, SystemVerilog, SystemC, DV leadership
Our client is a cutting-edge AI hardware innovator pushing the limits of performance, usability, and efficiency. They are currently looking for a seasoned Digital DV Leader to join their remote team in Taiwan. This is a rare opportunity to work on some of the most advanced verification challenges in the AI acceleration and CPU design space—within a collaborative and mission-driven engineering team.
A leading player in the semiconductor industry is seeking an experienced Design Verification Engineer to join their innovative team in Hsinchu. This role is ideal for someone with a strong background in central DV flow development, VIP integration, and collaborative verification processes. The successful candidate will have the opportunity to make a significant impact on cutting-edge projects in a fast-paced, technology-driven environment.
Keywords: Verification, System Verilog, High Speed Interface, Block/System-level Verification Environment
Our client is seeking a Design Verification Engineer to join their team in Hsinchu. This role offers an exciting opportunity to develop the NVMe/PCIe Verification environment using System Verilog, verify and debug high-speed interfaces, and build block/system-level verification environments. The successful candidate will be part of a dynamic team that values collaboration, commitment, and understanding.
