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我們為企業量身打造招募解決方案,以其快速、有效深受臺灣頂尖企業信賴。瀏覽由Robert Walters臺灣提供的各種客製化服務與資源。

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Analog Design Engineer (SerDes)

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A leading semiconductor company is seeking an Analog Design Engineer (PAM4) in Hsinchu. This role focuses on PCIe Gen6/Gen7 development, including advanced signaling, high-speed circuit design, and signal integrity. Join a collaborative, innovation-driven team with flexible work options and strong support for growth, contributing to next-generation high-speed interface technologies.

Salary: Competitive and based on experience

Location: Hsinchu

Keywords: high-speed interface, PAM4 architecture, PCIe Gen6 and Gen7, signal integrity, collaborative environment, flexible working options, semiconductor industry, circuit simulation, compliance testing, knowledge sharing

  • Join a renowned team at the forefront of high-speed interface technology development, where your contributions will help define the next generation of PCIe standards and advanced data transmission solutions.
  • Benefit from flexible working opportunities designed to support your professional ambitions as well as your personal wellbeing, ensuring you can achieve success without compromising on work-life balance.
  • Experience a supportive and inclusive workplace culture that invests heavily in training opportunities, encourages collaboration across disciplines, and empowers every engineer to make a meaningful impact on global connectivity.

What you'll do:

As an Analogue Design Engineer PAM4, you will immerse yourself in the full spectrum of high-speed interface solution development. Your day-to-day activities will involve designing state-of-the-art circuits for PCIe Gen6 and Gen7 applications, optimising PAM4 architectures for maximum efficiency, and performing thorough simulations to validate your work. You will engage in hands-on debugging sessions, collaborate with multidisciplinary teams to integrate your designs seamlessly into larger systems, and play a key role in compliance testing efforts. Success in this position requires not only technical proficiency but also a collaborative spirit—your ability to communicate effectively with colleagues across departments will ensure that every project milestone is met with precision. By leveraging your deep understanding of signal integrity and jitter analysis, you will help deliver reliable products that exceed industry expectations.

  • Lead the design and development of high-speed interface solutions based on PCIe Gen6 and Gen7 standards, ensuring robust performance and reliability.
  • Develop and optimise PAM4 signalling architectures, including both transmitter (TX) and receiver (RX) design, to achieve superior data transmission rates.
  • Perform comprehensive high-speed circuit simulations, validate designs through rigorous testing, and support silicon bring-up activities from prototype to production.
  • Conduct detailed signal integrity (SI) and jitter analysis for all high-speed interfaces, identifying potential issues early in the design process.
  • Collaborate closely with cross-functional teams such as digital designers, packaging engineers, and system validation specialists to ensure seamless integration of analogue components.
  • Debug complex high-speed interface issues throughout the product lifecycle, from initial concept through mass production release.
  • Support compliance testing procedures and interoperability validation to guarantee adherence to industry standards and customer requirements.
  • Utilise advanced EDA tools like HSPICE or Cadence for simulation tasks, ensuring accurate modelling of circuit behaviour under various conditions.
  • Document all design processes meticulously, maintaining clear communication with internal stakeholders regarding project progress and technical challenges.

What you bring:

To excel as an Analogue Design Engineer PAM4, you will bring a wealth of proven experience in high-speed interface design within the semiconductor industry. Your educational background will underpin your technical skills, while your practical experience developing PAM4 architectures will set you apart as a subject matter expert. You are adept at using sophisticated simulation tools to model complex circuits accurately and have demonstrated success navigating the intricacies of signal integrity analysis. Your familiarity with compliance testing ensures that your designs meet stringent industry standards from conception through production. In addition to your technical abilities, your interpersonal skills enable you to thrive within collaborative teams—sharing insights generously while remaining open to feedback from peers. Your commitment to continuous learning keeps you abreast of emerging trends in PCIe technology and advanced node processes.

  • Master’s degree or above in Electrical Engineering or a related field is required for this position, demonstrating strong academic foundations.
  • A minimum of five years’ experience in high-speed interface design ensures you are well-versed in industry best practices.
  • Proven track record developing PAM4 architecture solutions for advanced data transmission applications is essential.
  • Hands-on experience with PCIe, SerDes, or other high-speed I/O technologies equips you to tackle complex engineering challenges.
  • In-depth knowledge of signal integrity principles, jitter analysis techniques, equalisation methods (CTLE/DFE/FFE), and channel modelling is crucial for success.
  • Proficiency with EDA tools such as HSPICE or Cadence enables accurate simulation and verification of intricate circuit designs.
  • Familiarity with compliance testing protocols and lab measurement equipment supports effective validation of new products.
  • Experience working on PCIe Gen6 or Gen7 standard development is highly desirable for candidates seeking to make an immediate impact.
  • Background in advanced node design (such as 7nm or below) provides valuable insight into cutting-edge manufacturing processes.

What sets this company apart:

This organisation stands out as a leader in the semiconductor sector by consistently pushing the boundaries of what is possible in high-speed interface technology. Employees benefit from a culture that prioritises collaboration over competition—fostering an inclusive environment where knowledge sharing is encouraged at every level. The company invests heavily in training opportunities so that each team member can grow their skillset alongside technological advancements. Flexible working arrangements allow staff to maintain a healthy work-life balance without compromising on professional achievement. With access to state-of-the-art tools and resources, employees are empowered to contribute meaningfully to projects that shape the future of global connectivity. The leadership team is approachable and supportive, always ready to provide guidance or celebrate shared successes. This commitment to employee wellbeing makes it an ideal place for talented engineers who value teamwork, personal growth, and making a tangible impact on the world stage.

What's next:

If you are passionate about advancing high-speed analogue design technology and eager to contribute your expertise within a supportive team environment, this is your opportunity to shine—apply now!

Apply today by clicking on the link provided; take the next step towards joining an organisation where your skills will be valued and your career can flourish.

招募類型: 永久性

專業領域: 半導體

職務類別: 類比IC設計

產業: 工程

薪資: Negotiable

辦公模式: 實體辦公模式

經驗: 專員

地區 Hsinchu County

職務參考: CK7P58-4D53A097

發佈日期: 2026年6月18日

獵頭顧問 Gary Liao

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