Senior High Speed Digital Design Engineer

Seek Senior Digital Design Specialist for HPC connectivity. Lead architecture and integration of advanced chiplet IPs for AI accelerators. Join an elite global team working on cutting-edge silicon technology!

Core Responsibilities

• IP Architecture & Development: Drive the design and micro-architecture development of high-speed interconnect and data-path digital IPs tailored for advanced modular SoC architectures.

• Subsystem Integration: Manage the seamless integration of protocol controllers and high-speed physical layers (PHY), ensuring strict adherence to timing closure, synthesis, and Design-for-Test (DFT) requirements.

• Specification & Implementation: Define robust architectural interface specifications, establish comprehensive verification plans, and provide technical support through physical implementation and silicon onboarding phases.

• Cross-Functional Collaboration: Partner closely with Analog/Mixed-Signal designers, Firmware architecture teams, and system validation engineers to optimize overall silicon performance.