Sr. Test Engineer (Mix-Signal)
We are looking for a Test Engineer to support ATE hardware/software development, product characterization, and production test optimization for semiconductor products. This role requires hands-on experience with Teradyne Eagle (e.g. ETS88/ETS800) platforms, along with strong debugging and data analysis capabilities.
Key Responsibilities
- Develop and maintain ATE hardware and software for semiconductor product testing.
- Support new product introduction (NPI), characterization, validation, and production release activities.
- Conduct temperature characterization, data analysis, and test optimization to ensure product quality and performance.
- Collaborate with Design, Product, and Application Engineering teams throughout product development cycles.
- Troubleshoot production test issues, perform root cause analysis, and implement corrective actions.
- Design and validate test hardware including load boards and interface circuits.
- Improve test coverage, yield, and manufacturing efficiency through continuous test program enhancements.
- Generate technical documentation and communicate testing results with cross-functional teams.
Requirements
- Bachelor's degree in Electrical Engineering or related field.
- 5+ years of semiconductor test engineering experience.
- Hands-on experience with Teradyne Eagle platforms (ETS88 / ETS364 / ETS800...)
- Expereince in PWM Controllers, SPS, and eFuse testing methodologies.
- Experience in ATE hardware development, characterization, and production support.
- Proficiency with schematic design tools such as ORCAD or Allegro.
- Strong debugging, data analysis, and root cause analysis skills.
- Ability to work independently and collaborate with cross-functional engineering teams.
Preferred Qualifications
- Experience supporting high-volume manufacturing environments.
- Knowledge of analog and power management IC testing.
- Familiarity with multisite test development and yield improvement.
關於職缺
招募類型: 永久性
專業領域: 半導體
職務類別: 封裝/測試
產業: 工程
薪資: Negotiable
辦公模式: 實體辦公模式
經驗: 專員
地區 Hsinchu City
FULL_TIME職務參考: 4I2DRN-F01D6BEF
發佈日期: 2026年6月12日
獵頭顧問 Joanne Chen
taipei semiconductor/package-test 2026-06-12 2026-08-11 engineering Hsinchu City TW Robert Walters https://www.robertwalters.com.tw https://www.robertwalters.com.tw/content/dam/robert-walters/global/images/logos/web-logos/square-logo.png true