SoC Designer

We are currently seeking a highly skilled and motivated Senior SoC Design & Integration Engineer to join a world-class, US-based semiconductor company. This team is at the forefront of high-speed connectivity solutions, driving innovation in data center and network infrastructure.

Key Responsibilities:

• Lead the SoC integration and logic design for high-performance chips, ensuring seamless communication across the system.

• Design and implement complex Clock/Reset architectures, and resolve challenging CDC/RDC (Clock/Reset Domain Crossing) and Async FIFO issues.

• Integrate various high-speed and system interfaces, including PCIe, I3C, SPI, and SMBus, managing their respective bus protocols (AHB/APB).

• Collaborate with the DFT team to implement advanced techniques such as scan compression, MBIST, and boundary scan for high-yield production.

• Support the backend flow by performing synthesis and Static Timing Analysis (STA) to achieve timing closure on critical paths.

• Develop power-aware designs using UPF/CPF to meet aggressive low-power requirements.

Qualifications:

• BS/MS in Electrical Engineering, Computer Engineering, or a related field.

• 6+ years of solid experience in SoC design and system-level integration.

• Deep understanding of on-chip bus protocols (AHB/APB) and DMA controllers.

• Proven track record with high-speed serial/parallel interfaces and JTAG debugging.

• Strong hands-on experience with EDA tools for synthesis and timing analysis.