We are currently seeking a highly motivated and dynamic individual for the position of Technology Head (Architecture). The ideal candidate should possess excellent interpersonal and communication skills, with a strong focus on product promotion and customer engagement. Proficiency in both English and Japanese would be a significant advantage, as this role involves frequent business travel to the United Kingdom, the United States, and European countries.
Cultural Proficiency: An individual with a strong charm in both personal and professional aspects, emphasizing expertise in product promotion and effective customer interaction.
Educational Background: A Ph.D. graduate from a renowned university in Europe or the United States is preferred. Exceptional candidates with domestic doctoral degrees will also be considered.
Technical Expertise: Background in Electrical Engineering (EE) is essential, with a solid understanding of System-on-Chip (SOC) concepts. Proficiency in software solutions for SOC, addressing performance issues, data structure planning, and architectural design is required. Familiarity with SystemC and Virtual Platform for hardware simulation through software methods is a plus. While the detailed technical implementations are handled by engineers, the candidate should possess a good understanding of software aspects.
AI Interest: The candidate should have a keen interest in the future development of AI. This includes exploring ideas and concepts for intelligently identifying performance issues and designing architectures using AI methodologies.
Team Collaboration: A collaborative team player who values input from others. The ability to work effectively within a team is crucial for success in this role.
Reporting Structure: This position reports directly to the General Manager or Chairman of the company. Initially, the role will involve Individual Contributor (IC) responsibilities, with potential discussions for managerial responsibilities based on suitability and performance.
If you meet these criteria and are excited about contributing to a dynamic and innovative environment, we encourage you to apply for this challenging opportunity.
A Taiwan Listed Design House is looking for an experienced Physical Design Technical Manager (APR) to join the company. This company provides great opportunity for talents to leverage his/her expertise to drive the business growth
A taiwan listed IC Design House is looking for an experienced Quality Head to join the company. This company provides great opportunity for talents to exercise the quality strategy to drive the business growth.
• Assume a senior role in Design Verification (DV) focusing on PCIe IPs and System-on-Chip (SoC) products.
• Lead the architecture and construction of a comprehensive UVM verification environment at system and unit levels.
• Collaborate with architects to formulate verification strategies and execution plans.
• Review metrics, ensuring high-quality task delivery.
• Perform in-depth analysis of Functional, Code, and Test Plan Coverage.
• Drive and participate in Code Reviews, emphasizing quality improvement initiatives.
• Take charge of root cause analysis and corrective actions for Functional bugs discovered in Silicon.
• Manage projects from scratch to completion, overseeing Design Verification sign-off.
• Hold a Master’s degree in Electrical Engineering or a related field.
• Possess 5 years of industrial experience in Design Verification.
• Proficient in SystemVerilog and Object-Oriented Programming.
• Experience with UVM, SVA, VIP, DPI.
• Thorough understanding of verification best practices.
• Proficient in the PCIe protocol stack.
• Skilled in scripting languages like Python, TCL, Shell, Perl.
• A self-motivated team player.
• Substantial experience in overall design verification within the ASIC industry.
• Previous experience in a lead or management role in design verification.
• Strong background in developing verification environments using System Verilog.
• Expertise in constrained random verification methodologies.
• Formal verification experience is advantageous.
• Extensive track record of verifying complex designs using UVM.
• Familiarity with CXL, AXI, AHB, USB, I2C, Ethernet.
• Experience in the verification of Hardware-Firmware interaction is highly desirable.
• Background in digital signal processing.
• Experience in PCIE GEN 4, 5, 6 is highly preferred.
A Taiwan listed IC Design House is looking for an experienced Analog Design Manager to join the company. This company provides great opportunity for talents to leverage his/her expertise in PMIC to drive the business growth.
1 Develop and maintain the central DV flow.
2 Collaborate with the design team and DV team to assess new DV flow.
3 Debug and analyze unit/block/whole-chip verification environments.
4 Provide technical consulting on various verification methodologies.
What We Are Looking For:
1 8+ years of related working experience.
2 Hands-on experience in whole-chip test bench setup.
3 Hands-on experience on high-speed IO protocols verification, like PCIe, USB3, USB4, DDR4, LPDDR4.
4 Proficiency in verification methodologies such as UVM, VMM, or OVM.
5 Familiarity with Verilog/SystemVerilog and script languages.
1 Familiarity with constrained random verification.
2 Familiarity with assertion-based verification.
3 Familiar with low power verification
4 Familiarity with Synopsys Zebu/HAPS or Cadence Palladium/Protium.
A Taiwan listed IC Design House is looking for an experienced Analog Design Manager (Clocking) to join the company. This company provides great opportunity for talents to leverage his/her expertise in Clocking to drive the business growth.