Packaging Engineer (FPGA)
About the Role We are looking for an experienced Principal Packaging Engineer to lead advanced semiconductor packaging development for high-performance IC products. This role involves cross-functional collaboration, technical leadership, and hands-on problem solving in package design, assembly process optimization, and technology development. You will work closely with silicon, packaging, systems, and IC design teams to deliver reliable, manufacturable, and cost-effective package solutions for next-generation devices. This position suits engineers who enjoy both technical depth and teamwork in a supportive environment.
Key Responsibilities
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Lead the definition and development of advanced IC package solutions, ensuring electrical, mechanical, and thermal requirements are met.
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Collaborate with silicon and IC design teams to evaluate and select optimal package structures aligned with performance, cost, and reliability targets.
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Develop BOMs, define assembly processes, and support troubleshooting for package-related issues in NPI or technology introduction.
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Prepare detailed documentation, design guidelines, and assembly instructions for internal and external stakeholders.
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Drive new package technology development and continuous improvement projects.
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Oversee package qualification for commercial and automotive applications.
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Coordinate with assembly partners from early development through volume production.
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Stay updated on packaging trends and propose innovations to enhance reliability and manufacturability.
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Support process enhancement initiatives and identify opportunities for structural or material improvements.
What You Bring
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Bachelor’s or Master’s degree in Electrical Engineering, Mechanical Engineering, Materials Science, or related field.
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10+ years of experience in semiconductor packaging, with at least 5 years focused on IC package development.
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Strong knowledge of mid-range pin-count packages such as flip chip BGA/LGA (organic/ceramic), WLCSP, wire-bond BGA, or CSP.
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Understanding of chip-package interaction, material behavior, and reliability mechanisms.
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Experience with BEOL-related topics such as top metal, passivation, UBM, bumping, or wafer-level processes.
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Familiarity with substrate technologies and manufacturing processes.
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Proven ability to collaborate across functions and drive alignment among engineering teams.
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Demonstrated experience managing multiple projects from concept to production.
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Strong analytical and problem-solving abilities, with high attention to detail.
What You Can Expect
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A collaborative and knowledge-sharing work environment.
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Opportunities to participate in advanced technology development and long-term product roadmap initiatives.
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Flexible working arrangements and ongoing professional development opportunities.
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A culture that values teamwork, open communication, and technical excellence.
About the job
Contract Type: Perm
Specialism: Semiconductor
Focus: Package & Test
Industry: Engineering
Salary: Negotiable
Workplace Type: On-site
Experience Level: Associate
Location: Hsinchu City
FULL_TIMEJob Reference: OH9T90-E58C4B06
Date posted: 2 December 2025
Consultant: Joanne Chen
taipei semiconductor/package-test 2025-12-02 2026-01-31 engineering Hsinchu City TW Robert Walters https://www.robertwalters.com.tw https://www.robertwalters.com.tw/content/dam/robert-walters/global/images/logos/web-logos/square-logo.png true