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Packaging Engineer (FPGA)

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About the Role We are looking for an experienced Principal Packaging Engineer to lead advanced semiconductor packaging development for high-performance IC products. This role involves cross-functional collaboration, technical leadership, and hands-on problem solving in package design, assembly process optimization, and technology development. You will work closely with silicon, packaging, systems, and IC design teams to deliver reliable, manufacturable, and cost-effective package solutions for next-generation devices. This position suits engineers who enjoy both technical depth and teamwork in a supportive environment.

Key Responsibilities

  • Lead the definition and development of advanced IC package solutions, ensuring electrical, mechanical, and thermal requirements are met.

  • Collaborate with silicon and IC design teams to evaluate and select optimal package structures aligned with performance, cost, and reliability targets.

  • Develop BOMs, define assembly processes, and support troubleshooting for package-related issues in NPI or technology introduction.

  • Prepare detailed documentation, design guidelines, and assembly instructions for internal and external stakeholders.

  • Drive new package technology development and continuous improvement projects.

  • Oversee package qualification for commercial and automotive applications.

  • Coordinate with assembly partners from early development through volume production.

  • Stay updated on packaging trends and propose innovations to enhance reliability and manufacturability.

  • Support process enhancement initiatives and identify opportunities for structural or material improvements.


What You Bring

  • Bachelor’s or Master’s degree in Electrical Engineering, Mechanical Engineering, Materials Science, or related field.

  • 10+ years of experience in semiconductor packaging, with at least 5 years focused on IC package development.

  • Strong knowledge of mid-range pin-count packages such as flip chip BGA/LGA (organic/ceramic), WLCSP, wire-bond BGA, or CSP.

  • Understanding of chip-package interaction, material behavior, and reliability mechanisms.

  • Experience with BEOL-related topics such as top metal, passivation, UBM, bumping, or wafer-level processes.

  • Familiarity with substrate technologies and manufacturing processes.

  • Proven ability to collaborate across functions and drive alignment among engineering teams.

  • Demonstrated experience managing multiple projects from concept to production.

  • Strong analytical and problem-solving abilities, with high attention to detail.


What You Can Expect

  • A collaborative and knowledge-sharing work environment.

  • Opportunities to participate in advanced technology development and long-term product roadmap initiatives.

  • Flexible working arrangements and ongoing professional development opportunities.

  • A culture that values teamwork, open communication, and technical excellence.

Contract Type: Perm

Specialism: Semiconductor

Focus: Package & Test

Industry: Engineering

Salary: Negotiable

Workplace Type: On-site

Experience Level: Associate

Location: Hsinchu City

Job Reference: OH9T90-E58C4B06

Date posted: 2 December 2025

Consultant: Joanne Chen