Digital Designer (PCIE)

We are looking for a Digital Design Engineer to join our Zhubei team, focusing on PCIe and high-speed digital design. You will work on block-level architecture, RTL development, and silicon bring-up, collaborating with global teams in verification, backend, and firmware. This is an exciting chance to join a fast-growing international company driving next-generation connectivity solutions.

Responsibilities

• Define block-level micro-architecture and write design specifications

• RTL implementation with consideration for power, area, and timing constraints

• Collaborate with verification teams to ensure functionality and coverage

• Work with backend teams throughout the ASIC flow to achieve successful tape-out

• Partner with firmware teams to develop APIs and support silicon bring-up

• Conduct post-silicon validation and debug activities

Minimal Qualifications

• Master’s degree in Electrical Engineering or related field

• 3+ years of industrial experience in ASIC design

• Solid background in micro-architecture and RTL design of complex blocks

• Proficiency in HDL for RTL design (Verilog / SystemVerilog)

• Familiarity with design & verification tools (VCS, Verdi, DC, etc.)

• Hands-on experience with ASIC design flow: RTL design, lint, CDC, LEC, synthesis, DFT, STA, floor-planning, GLS, ECO, bring-up & lab debug

• Proficiency in scripting (Python, TCL, Shell, or Perl)

• Strong teamwork and self-driven attitude