Design Verification Leader (Fully Remote)

Keywords: AI hardware, RISC-V, UVM, FPGA prototyping, Emulation, SystemVerilog, SystemC, DV leadership Our client is a cutting-edge AI hardware innovator pushing the limits of performance, usability, and efficiency. They are currently looking for a seasoned Digital DV Leader to join their remote team in Taiwan. This is a rare opportunity to work on some of the most advanced verification challenges in the AI acceleration and CPU design space—within a collaborative and mission-driven engineering team.

Why This Role?

• Contribute to breakthrough AI hardware featuring in-house developed high-performance RISC-V CPUs

• Lead verification efforts on complex IP and SoC projects

• Work 100% remotely with a global team of top-tier engineers

Your Impact

In this role, you’ll lead the verification strategy and execution for digital IPs and SoCs. You’ll be hands-on in designing robust verification environments, creating test plans, writing testbenches, and performing convergence analysis for successful tape-outs. You'll also play a key role in performance and power validation.

Your Responsibilities Will Include:

• Leading verification of IPs and SoC logic using modern methodologies like UVM, emulation, and FPGA prototyping

• Building testbenches, checkers, assertions, and functional models

• Writing and maintaining functional coverage and constrained-random test scenarios

• Analyzing verification metrics, debugging failures, and ensuring convergence

• Supporting performance and low-power verification at both IP and SoC level

What You Bring

You’re an experienced verification engineer with a solid track record in building scalable DV infrastructures for complex hardware. You are confident in SystemVerilog/UVM, and you’re comfortable working in fast-moving, cross-functional teams. You bring a deep interest in computer architecture and enjoy building things from the ground up.

Required Skills:

• 15+ years in digital verification with strong hands-on skills in SystemVerilog and/or SystemC

• Bachelor's or Master’s degree in Electrical/Computer Engineering or related fields

• Solid experience with UVM and coverage-driven constrained-random methodologies

• Experience with low-power verification techniques

• Proficiency in C/C++ and scripting languages (e.g., Perl, Tcl, Python)

• Strong architectural understanding of SoC and CPU systems (especially RISC-V is a plus)

Why Join This Team?

This company was founded by a group of technologists with a shared ambition to build the best AI hardware platform. With a fresh RISC-V CPU design at its core, the team blends deep hardware expertise with a passion for intelligent systems. They offer competitive compensation, flexible work arrangements, and a high-impact environment where you can do your best work without bureaucracy.