Design Verification Engineer
Keywords: Verification, System Verilog, High Speed Interface, Block/System-level Verification Environment Our client is seeking a Design Verification Engineer to join their team in Hsinchu. This role offers an exciting opportunity to develop the NVMe/PCIe Verification environment using System Verilog, verify and debug high-speed interfaces, and build block/system-level verification environments. The successful candidate will be part of a dynamic team that values collaboration, commitment, and understanding.
What you'll do:
As a Design Verification Engineer, you will play a crucial role in developing the NVMe/PCIe Verification environment leveraging System Verilog. You will also be responsible for verifying and debugging high-speed interfaces. Your expertise will be vital in building block/system-level verification environments. Collaborating with design and architecture teams will be key to ensuring system coherency and performance. Your contribution will be pivotal in the development of methodologies, execution of validation plans, and debugging of failures. This role provides an excellent opportunity to showcase your technical expertise for next-generation initiatives.
- Build and implement SystemVerilog-based verification environments for NVMe or PCIe protocols.
- Verify and debug the high speed interface
- Build up block/system-level verification environment
- Work closely with the design and architecture teams to ensure system coherency and performance
- Contribute to the development of methodologies, execution of validation plans, and debug of failures
- Provide technical expertise for next generation initiatives
What you bring:
The ideal candidate for the Design Verification Engineer position holds a Master's degree or above in Information Engineering, Electrical/Electronic Engineering or a related field. With at least 3 years of relevant work experience under your belt, you are familiar with high-speed (PCIE, USB, MIPI, SATA) protocols and architecture. Your knowledge extends to AMBA interface (AHB, APB, AXI) protocol and DDR protocol. You have hands-on experience in design verification such as UVM and system Verilog / Verilog. Your ability to collaborate effectively makes you a valuable addition to our team.
- Master's degree or above in Information Engineering, Electrical/Electronic Engineering or related field with at least 3 years of relevant work experience
- Familiarity with high speed protocol and architecture. E.g. PCIE, USB, MIPI, SATA
- Knowledge of AMBA interface (AHB, APB, AXI) protocol
- Experience with DDR protocol
- Knowledge and design experience of design verification such as UVM and system Verilog / Verilog
What sets this company apart:
Our client is renowned for its commitment to innovation and excellence. They offer a supportive work environment that encourages growth and learning. They believe in fostering a culture of collaboration and understanding, where every team member's contribution is valued. Their commitment to diversity and inclusion makes them a preferred employer for those seeking a dynamic and inclusive work environment.
What's next:
If you're ready to take the next step in your career, apply today!
Apply today by clicking on the link!
About the job

Contract Type: FULL_TIME
Specialism: Semiconductor
Focus: Design Verification
Industry: Engineering
Salary: Negotiable
Workplace Type: On-site
Experience Level: Entry Level
Location: Hsinchu City
FULL_TIMEJob Reference: MO3KFA-B68F8438
Date posted: 25 April 2025
Consultant: Joanne Chen
taipei semiconductor/design-verification 2025-04-25 2025-06-24 engineering Hsinchu City TW Robert Walters https://www.robertwalters.com.tw https://www.robertwalters.com.tw/content/dam/robert-walters/global/images/logos/web-logos/square-logo.png true