Design Verification Engineer

Keywords: DV, Engineer, SoC Design, System-level design verification, Test plans development Our client is a rapidly growing start-up, seeking a Design Verification Engineer with at least 2 years of relevant experience. This role offers an exciting opportunity to work on complex SoC designs from world-class companies. With competitive salary and cash and stock bonuses, this position provides significant growth opportunities for your career and financial advancement. If you're looking for a role that balances work and life, this could be your ideal choice!

What you'll do:

• Verify complex SoC designs from world-class companies.
• Develop test plans, platforms, cases, reference models, coverage models, and regression suites.
• Perform RTL simulation, function verification, and fault debugging.
• Drive and achieve coverage closure.
• Familiarity with ARM or RISC-V & AMBA bus protocol, and SVA/UVM test platform framework is beneficial.

What you bring:

• Bachelor's, Master's, or Ph.D. in Electrical Engineering, Computer Science, or related majors.
• Experience in verification at Unit/Sub-system/SOC level and expertise in SystemVerilog.
• Knowledge of random stimulus with functional coverage and assertion-based verification methodologies.
• Experience with verification methodologies like UVM/VMM and industry-standard verification tools.
• At least 2 years of relevant experience.

What sets this company apart:

• Rapidly growing start-up with significant growth opportunities.
• Competitive salary, cash, and stock bonuses.
• Emphasis on work-life balance.

What's next:

Ready to advance your career? Apply now by clicking on the link!