An IC Design House is looking for an experienced Staff RF Design Engineer to join the company. This company provides great opportunity for talents to leverage his/her expertise in MMIC to drive the business growth.
Job Purpose: The individual will assume responsibility for the development of GaAs-based RF and microwave devices, such as Doherty Power Amplifiers (PAs), Low-Noise Amplifiers (LNAs), Mixers, Switches, etc., in accordance with Target Specifications. Tasks will encompass schematic entry and simulation, layout design including parasitic extraction and Electromagnetic (EM) simulation, as well as package specification. Additionally, crucial aspects include conducting design reviews with comprehensive documentation, preparing test plans, and providing guidance for data sheet creation. The candidate will actively contribute to product definition, initial characterization, and qualification. Strong expertise in Monolithic Microwave Integrated Circuit (MMIC) design and familiarity with industry-standard tools such as AWR or ADS are prerequisites.
Key Responsibilities: - Manage Design Projects from initiation to the commencement of Mass Production - Conduct schematic entry and simulation - Execute layout design, including parasitic extraction and EM simulation - Conduct and support analysis, characterization, and testing of the design - Prepare thorough design documentation and reports - Develop presentations for design and tape-out reviews - Offer input and guidance for Datasheet generation - Provide input and guidance for Test and Characterization Program development - Collaborate closely with product definition, marketing, and other stakeholders - Provide insights to enhance the design and project management workflow - Mentor less experienced MMIC design engineers - Ensure the achievement of First-Time-Right designs
Required Qualifications: - PhD or Master's Degree in Electrical Engineering or a related field - Minimum of 10 years of experience as an MMIC designer - Expertise in GaAs and GaN designs - Proficiency with software tools, preferably AWR, ADS, Matlab, and Microsoft Office - Familiarity with RF test equipment, including network and spectrum analyzers, power meters, RF signal sources, and wafer probers - Excellent communication and problem-solving skills - Proficient in English - Capable of working independently on the entire design process - Passionate self-starter and team player willing to share experiences and guide others
A Taiwan Listed Design House is looking for an experienced Physical Design Technical Manager (APR) to join the company. This company provides great opportunity for talents to leverage his/her expertise to drive the business growth
A taiwan listed IC Design House is looking for an experienced Quality Head to join the company. This company provides great opportunity for talents to exercise the quality strategy to drive the business growth.
We are currently seeking a highly motivated and dynamic individual for the position of Technology Head (Architecture). The ideal candidate should possess excellent interpersonal and communication skills, with a strong focus on product promotion and customer engagement. Proficiency in both English and Japanese would be a significant advantage, as this role involves frequent business travel to the United Kingdom, the United States, and European countries.
• Assume a senior role in Design Verification (DV) focusing on PCIe IPs and System-on-Chip (SoC) products.
• Lead the architecture and construction of a comprehensive UVM verification environment at system and unit levels.
• Collaborate with architects to formulate verification strategies and execution plans.
• Review metrics, ensuring high-quality task delivery.
• Perform in-depth analysis of Functional, Code, and Test Plan Coverage.
• Drive and participate in Code Reviews, emphasizing quality improvement initiatives.
• Take charge of root cause analysis and corrective actions for Functional bugs discovered in Silicon.
• Manage projects from scratch to completion, overseeing Design Verification sign-off.
• Hold a Master’s degree in Electrical Engineering or a related field.
• Possess 5 years of industrial experience in Design Verification.
• Proficient in SystemVerilog and Object-Oriented Programming.
• Experience with UVM, SVA, VIP, DPI.
• Thorough understanding of verification best practices.
• Proficient in the PCIe protocol stack.
• Skilled in scripting languages like Python, TCL, Shell, Perl.
• A self-motivated team player.
• Substantial experience in overall design verification within the ASIC industry.
• Previous experience in a lead or management role in design verification.
• Strong background in developing verification environments using System Verilog.
• Expertise in constrained random verification methodologies.
• Formal verification experience is advantageous.
• Extensive track record of verifying complex designs using UVM.
• Familiarity with CXL, AXI, AHB, USB, I2C, Ethernet.
• Experience in the verification of Hardware-Firmware interaction is highly desirable.
• Background in digital signal processing.
• Experience in PCIE GEN 4, 5, 6 is highly preferred.
A Taiwan listed IC Design House is looking for an experienced Analog Design Manager to join the company. This company provides great opportunity for talents to leverage his/her expertise in PMIC to drive the business growth.
1 Develop and maintain the central DV flow.
2 Collaborate with the design team and DV team to assess new DV flow.
3 Debug and analyze unit/block/whole-chip verification environments.
4 Provide technical consulting on various verification methodologies.
What We Are Looking For:
1 8+ years of related working experience.
2 Hands-on experience in whole-chip test bench setup.
3 Hands-on experience on high-speed IO protocols verification, like PCIe, USB3, USB4, DDR4, LPDDR4.
4 Proficiency in verification methodologies such as UVM, VMM, or OVM.
5 Familiarity with Verilog/SystemVerilog and script languages.
1 Familiarity with constrained random verification.
2 Familiarity with assertion-based verification.
3 Familiar with low power verification
4 Familiarity with Synopsys Zebu/HAPS or Cadence Palladium/Protium.